Machine Learning and Networks on Chip

Davide Bertozzi, University of Ferrara

Sujay Deb, Indraprastha Institute of Information Technology, Delhi (IIIT-D)

Masoumeh (Azin) Ebrahimi, KTH Royal Institute of Technology

Prabhat Mishra, University of Florida

Abstract: Fueled by advancements in computational power and algorithmic innovations, Machine Learning (ML) models and methods have witnessed a renewed interest in virtually all application areas during the last fifteen years. Researchers from the general areas of electronic design automation and computer architecture and of Network-on-Chip (NoC) particularly have already tapped into ML to develop better algorithms, domain specific architectures, and design and optimization flows and methodologies. The ML movement is still going on. It is the main goal of this Panel to highlight some of the recent related contributions, including ML-based security attacks and countermeasures, deep-learning acceleration/neuromorphic computing, ML-based validation and verification, and ML-based adaptive routing. However, another goal of the Panel is to also engage panelists and the audience in a discussion about ML and NoCs in general - in an attempt to project on the future directions in this area, with their potential benefits and possible challenges.